The CPU we used has no encoder pheripherial, the encoders are read in software using interrupt routines.
And even if the CPU would have such pheripherial, it is then hard wired to mostly one-one physical pin and on some CPUs it is configurable to a few different pins, but never to all pins. And in the UCCNC every pheripherial is freely configurable to any pins, so then this would be an exception which is unwanted as our concept is to make everything as configurable and flexible as much as possible.
Also the -5LPT motherboard has an RC filter on the inputs to filter out noise and it is also a limit for the max. input frequency.
And for threading and rigid tapping there is no need for high resolution encoder, our algorithm does rotational speed
lookahead, so it calculates to even in between 2 encoder counts.
However in reality it is not even important to do that much precision.